SystemC Modeling with Introduction to TLM 2.0

A three-day workshop for engineers who are new to SystemC or those who may be self-taught. Covers the SystemC C++ class library and the TLM 2.0 library.

This three-day workshop introduces the student to the SystemC C++ class library and the TLM 2.0 modeling standard. It is intended for engineers who are new to SystemC or those who may be self-taught, with an interest in learning SystemC for modeling purposes.  

The student will learn how to write, compile, execute and debug system and hardware descriptions with SystemC as well as a basic introduction to the OSCI TLM 2.0 modeling standard.

This course is mixed lecture and exercises, with an exercise for nearly every topic.

Syllabus

• Introduction to SystemC 
  • Core Library Basics
    • Modules
    • Communication (channels, ports & exports)
    • Module Constructor (+ exercise)
    • Simulation
    • Scheduler
    • Events  & Event Queues
  • Modeling Behavior
    • Method processes (+ exercise)
    • Thread processes (+ exercise)
    • Module instantiation (in module) (+ exercise)
    • Simulation Initialization
  • Core Library Elements
    • SystemC data types
    • Primitive channels
  • User defined channels (+ exercise)
    • Custom Constructors
  • Exports
  • Dynamic Processes (+exercise)

•  Introduction to the OSCI TLM 2.0 Standard
  • TLM 2.0 Overview
    • Generic payload
    • TLM 2.0 Interfaces Overview
    • Sockets
  • LT Coding style 
    • Blocking Transport interface
    • Temporal decoupling / Quantum Keeper
  • DMI Interface
  • Debug Interface
  • AT Coding Style
    • Non-blocking transport interface
    • Payload Event Queue (PEQ)
  • (+LT Modeling Exercise)

Hands-On Labs

A good portion of class time will be spent applying principles learned in lecture to hands-on labs

Prerequisites

• Introduction to C++ training course or equivalent experience

Course may be taken immediately before this course