Introduction to SystemC for Modeling with TLM 2.0
A three-day workshop for engineers who are new to SystemC or those who may be self-taught. Covers the SystemC C++ class library and the TLM 2.0 library.
This three-day workshop introduces the student to the SystemC C++ class library and the TLM 2.0 library. It is intended for engineers who are new to SystemC or those who may be self-taught, with an interest in learning SystemC for modeling purposes.
The student will learn how to write, compile, execute and debug system and hardware descriptions with SystemC and Loosely-timed and Approximately-timed TLM 2.0 coding styles.
This course is mixed lecture and exercises, with an exercise for nearly every topic.
Syllabus
- Introduction
- Modeling overview
- Modules
- Channels, ports, interfaces
- Module constructor
- Events
- Event queue
- Thread processes
- Method processes
- Module instantiation (in modules)
- Simulation initialization
- SystemC data types
- Primitive channels
- User defined channels
- Exports
- Dynamic processes
- OSCI TLM 1.0 standard
- OSCI TLM 2.0 standard
- LT coding style
- AT coding style
- DMI and debug Interface
Hands-On Labs
A good portion of class time will be spent applying principles learned in lecture to hands-on labs
Prerequisites
• Introduction to C++ training course or equivalent experience
Course may be taken immediately before this course
Class Dates & Locations
| Begin Date | End Date | Location | Enroll |
|---|---|---|---|
| There are no scheduled classes available. | |||